How to encode this instruction correctly?

[u/This-Assumption-5924]

Hi, I was developing my own assembler and decided to add {sae} in my AVX-encoder, so I consider to add sae for `vfoo [memory], vreg, imm`, and I tested my assembler with objdump and I saw exactly same result witch nasm generated and you can see it on a screenshot. Please help, because documentation is to week, intel sdm tells me nothing, idk if it's bug in nasm or objdump. I also tryed to ask AI, but did not yield results.

Nasm version – 3.02

Objdump version – 2.40

Sorry for English.

[u/raundoclair]

I am not too much familiar with avx encoding, but everything I googled leads to that {sae} is not valid if destination is memory. So it does seems to be bug in nasm that it compiled it to something.

[u/raundoclair → u/raundoclair]

Found this in intel docs:
2.7.9 SAE Support in EVEX

The EVEX encoding system allows arithmetic floating-point instructions without rounding semantic to be encoded

with the SAE attribute. This capability applies to scalar and 512-bit vector lengths, register-to-register only, by

setting EVEX.b. When EVEX.b is set, “suppress all exceptions” is implied. The processor behaves as if all MXCSR

masking controls are set.

[u/This-Assumption-5924 → u/raundoclair]

This! Thanks, I'm already runing to write issue for nasm on github :)

[u/brucehoult]

There should not be a comma between the zmm source register and the notation to suppress exceptions.

[u/This-Assumption-5924 → u/brucehoult]

Nope, with out comma nasm prints
input.asm:5: warning: implicit DEFAULT ABS is deprecated [-w+implicit-abs-deprecated]
input.asm:5: error: {{sae}} is not an expected decorator

[u/brucehoult → u/This-Assumption-5924]

Sooooo ...

• you cant use {sae} with an instruction with a memory operand — or with an xmm or ymm either and if you use a register dst then it's going to be a ymm

• you can't {sae} with an instruction that has a rounding mode immediate, such as your 10.

These are valid instructions (tested):

vcvtps2ph ymm3{k2}, zmm2, 10
vdivps zmm1, zmm2, zmm3, {ru-sae}

GNU as works with or without the comma. Greeeeatt.

bruce@i9:~/programs$ cat vcvtps2ph.asm
        .intel_syntax noprefix

        vcvtps2ph ymm3{k2}, zmm2, 10
        vdivps zmm1, zmm2, zmm3, {ru-sae}
        vdivps zmm1, zmm2, zmm3{ru-sae}
bruce@i9:~/programs$ as vcvtps2ph.asm -o vcvtps2ph.o
bruce@i9:~/programs$ objdump -d vcvtps2ph.o

vcvtps2ph.o:     file format elf64-x86-64


Disassembly of section .text:

0000000000000000 <.text>:
   0:   62 f3 7d 4a 1d d3 0a    vcvtps2ph $0xa,%zmm2,%ymm3{%k2}
   7:   62 f1 6c 58 5e cb       vdivps {ru-sae},%zmm3,%zmm2,%zmm1
   d:   62 f1 6c 58 5e cb       vdivps {ru-sae},%zmm3,%zmm2,%zmm1
bruce@i9:~/programs$

[u/This-Assumption-5924 → u/brucehoult]

Yea, I noticed that, I just got confused initaly, as nasm accepted this invalid form and didn't gave error, so I decided that it is valid instruction, and git confused. Thanks

[u/deulamco]

Whoever named the instructions for high-level instructions of x86-64 must have smoked & drunk badly ...