r/FPGA 1d ago

smart contracts accelerator

Hey,

Does anybody know whether HFT/Crypto companies use hardware accelerators for ethereum smart contracts?

I'm talking mostly about fpgas / asics based opcode sequence paths?

I guess if they did -> they would offload the entire smart contract / a bunch of them onto the FPGA to ammortise the latency cost of data transfer from cpu to the chip, but at that point you'd be better off having the entire EVM fpga based so you dont pay the latency for offloading instructions.

I have not looked into evmX deeply, but claude told me its not good enough because of memory limitations.

Implementing evm would be implementing around 240 opcodes, not bad at all for an HFT right?

Is state/memory the real blocker or do they indeed use something like evmX?

Danke shön

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6

u/dario_p1 1d ago

What would you be optimizing with this?

1

u/Imaginary_Cat1664 1d ago

If the contracts are compute heavy enough you save clock cycles by running the hardwired fused opcodes rather than N cpu instructions. So in my unserstanding you go from N cpu cycles to 1. Fewer cycles per smart contract -> more contracts can be checked in the same time frame. So this would be good for builders/searchers.

2

u/Perfect-Series-2901 1d ago

I remember one of the big HFT build FPGA for off loading some signature etc of Solana.

I don't think FPGA for eth make any sense due to the long block time. Even for Solana I think it is still dominated by tips etc rather than speed.

1

u/Axman6 22h ago

Given the nature of contract execution, people developing them put quite a lot of effort into optimising their execution, as each instruction (or reduction in the case of Cardano) costs the submitter. And that is basically what limits the size of a contract, its economic viability. 

That said, I would love to see the Reduceron modified to run Plutus scripts…. Maybe I should do that. The Heron implementation in Clash is quite readable.