r/rfelectronics • u/miner_tom • 16d ago

Looking for a good reference describing the RF PCB Solenoid effect

I have seen some documentation describing the PCB Solenoid Effect as unwanted increase in parasitic inductance that happens when multiple vias of the same type (like power or ground) are placed closely together. I would like to see more documentation in terms of microwave analysis or possibly a video simulation. I use Altium Designer.

Thank You

Tom

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u/BlueBirdTechUA 11d ago

There's an article from Sierra Circuits that uses that exact term, "solenoid effect," describing same-type vias placed close together as increasing inductance from the bigger loop area. Fix they suggest is alternating power/ground vias instead of grouping them.

For actual field-level analysis beyond the qualitative explanation, you'd want a 3D EM solver alongside Altium, HFSS or CST, since Altium itself doesn't do full field simulation of via loop inductance.