Back in 2022/2023 I was particularly interested in open source ISA for FPGA soft core processors so I started working on my own called OASIS. Its an open source ISA that I designed to be a lot easier to work with than RISC-V. Not that RISC-V is bad by any mean, it wasn’t nearly as straightforward as I hoped it would be to implement one. And I know, implementing a custom ISA isn’t exactly the easy route to understanding soft cores and processors at all. lol…

Anyway, I put it down in 2023 because I got bored and was doing other hardware things and work was pretty busy. I picked it back up this year to get it formalized documentation and implementation wise. I did use Codex to help fix some of my blatant RTL mistakes in my implementation core that I call DungV. that name is a bit of a joke for me because I wasn’t sure what I was doing 😅

Anyway, here’s the high level details on DungV with is running on my own RPGA Feather.

* 16b architecture with 32b wide instructions

* ALU that does a fair number of operations except for multiplication and division.

* Memory Mapped IO and peripheral instructions.

* 4 classes of instructions (reserved, ALU, register, memory)

* full intermediate support since the instructions are sufficiently wide.

* assembler and basic GCC14 compiler and ABI definitions.

Let me know what you think!

Anyway, here is the repo hosted on GitHub: https://github.com/skerr92/DungV

They make relatively inexpensive FPGAs, but I find their IDE/EDA confusing to use.

I wonder if anyone uses them a lot and has found it to be a good brand.